In numerous systems capable of the transmission and the reception of data, there is often a need for the synchronization of data transmitted with an associated clock signal having known frequency and varying phase, with the clock signal of the receiving system. For example, such synchronization is necessary in a master system which transmits a request data stream with an associated request clock signal to a subsidiary system which receives the data stream and request clock signal and transmits a response data stream, with an associated response clock signal. The master system receives the response data steam and associated response clock signal. The response clock signal has a known frequency, but unknown phase, due to a variable delay in the data and clock paths.
The variable delay occurs in both the request data stream and request clock signal and the response data stream and response clock signal due to the combination of circuit delays and wire transmission delays. The delay may also vary after the system is initialized, due to the dependence of the delays upon, for example, temperature, operating voltage, and physical tension of the cable connecting the systems. In both cases (i.e., transmission and reception), the received clock signal can be used to generate a sampling clock which is used to reliably sample the data. The subsidiary system may use the sampling clock to synchronously clock all its storage elements or delay elements (such as latches, flip-flops, and phase delays), thus avoiding any problem of clock asynchrony.
However, the master system is faced with a Hobson's choice, as the master system may choose synchrony with either the request clock signal or the response clock signal, but not both. If synchrony with the request clock signal is maintained, a data synchronizer must be placed in the receiver of the master system, as the phase of the response clock signal is not predictable with respect to the request clock signal.
The choice of an optimal main system clock rate may depend on factors other than the required communication rate between the main and subsidiary systems, such as the delay of internal circuits and interconnections, required internal computation rates, and so on. When the rate of the main system clock is different from the rate of the request clock signal, both the request clock signal and response clock signal are asynchronous with the main system clock, and data synchronization is required in data paths both in the request data path and the response data path.
Thus, in systems transmitting and receiving data to and from various subsidiary systems, there exists a need for a method and apparatus for synchronizing both request data streams and response data streams to the clock signal of the receiving device, which accomplishes the synchronization with minimal delay and maximum reliability.